1. Field of the Invention
The present invention relates to a sense amplifier for low-supply-voltage nonvolatile memory cells.
2. Discussion of the Related Art
As is known, the reading of nonvolatile memory cells is normally based upon the comparison between the currents flowing through a selected memory cell (cell to be read) and a reference memory cell, biased with equal gate-source and drain-source voltages.
In practice, in known sense-amplifier circuits, the cell to be read and the reference memory cell are coupled to respective load transistors, which are connected to one another in a current-mirror configuration and hence have equal gate-source voltage. The currents flowing in the cells are thus converted into voltages, which are then directly compared by a comparator circuit having inputs connected to the drain terminals of the load transistors.
The traditional architecture in a current-mirror configuration, typically used for connection between the load transistors, limits, however, the performance of the known sense-amplifier circuits and, above all, causes their use to be critical in presence of low supply voltages.
In fact, in order to conduct a sufficient current, the load transistors must have a gate-source conduction voltage that is equal, in absolute value, to the sum of a threshold voltage and a so-called overdrive voltage. With reference to the typical case of load transistors of a PMOS type, with source terminals connected to a supply line, in both of the load transistors the gate terminal must be at a voltage lower than the supply voltage by an amount equal to the conduction voltage.
Furthermore, one of the load transistors (normally the one associated with the reference cell) is dioded connected, i.e., it has drain and source terminals directly connected to one another. It is thus evident that also the drain terminal is biased at a voltage equal to the supply voltage decreased by the conduction voltage.
Such a constraint, however, is scarcely compatible with the supply voltages currently used and, above all, conflicts with the need, which is increasingly felt, to reduce the supply voltages in order to minimize power consumption. The voltage on the gate terminal of the load transistors must in fact be sufficient to guarantee correct operation also of the cell to be read and, in particular, of the reference cell, which is in the most critical condition. Furthermore, also other components, which are normally cascaded between the drain terminal of the load transistor and the reference cell, must be biased with a sufficient voltage. In particular, there are usually provided a stage for regulating the drain voltage of the reference cell; and so-called “dummy” transistors, which reproduce on the side of the reference cell the effect of the column-decoder circuits.
As an example, consider a sense amplifier which receives a supply voltage of 1.8 V and is provided with a load transistor having a threshold voltage of 0.5 V and operating with an overdrive voltage of 0.3 V. In this case, the gate-source conduction voltage is equal to approximately 0.8 V, and thus the drain terminal of the diode-connected load transistor is at approximately 1 V, i.e., at the border of proper operation conditions. It is evident that even modest disturbances or thermal variations can readily cause malfunctioning.